Digital Signal Processing Reference
In-Depth Information
5
x 10
−3
(b)
(a)
50
40
30
30
4
25
20
10
20
3
0
−10
15
2
−20
S
clk
V
out,h
τ
clk
10
−30
40
1
−40
10
15
20
15
20
25
30
35
V
DD
[V]
V
bg
[V]
Fig. 6.16 a
Simulated output voltage of the dual Dickson up-converter without (
black line
)and
with (
grey line
) a 1nA load current applied.
b
The simulated behavior of the output voltage, the
clock swing and the clock period versus the backgate voltage applied to the ring oscillator and the
buffers with a 15 volt
V
DD
much. An important feature of this design compared to the first design in Sect.
6.3.1
is the backgate steering technique. By applying a high voltage to the backgate of
the pull-up transistors in the ring oscillator the noise margin of each inverter is
improved resulting in steeper clock signals with a swing that comes closer to the
V
DD
and
V
SS
rails. The latter improves the output voltage. Hence some kind of positive
feedback is applied that is further investigated in Sect.
6.3.2.2
. The backgate steering
is also applied to the diode-connected transistors in the forward paths of the Dickson
cores and improves the
I
on
/
both the on-state behavior and the off-state behavior of the diode were improved by
employing a 4-contact diode topology. Since the specifications demand for a high
output voltage but not for a high output current, the capacitors and the diodes of the
converter are much smaller than in the design in Sect.
6.3.1
. The capacitors have been
reduced by a factor of 25 and the diodes by a factor of 40. This of course results in
reduced area and power consumption.
6.3.2.2 Simulation
The simulation results of the dual Dickson up-converter are shown in Fig.
6.16
a. The
high output voltage that is generated through a 2-stage converter reaches 45V for a
20V supply voltage, whereas the low output voltage reaches down to
31V. When
a 1nA output current is applied the high and low output voltages are reduced by 3V
and 4V respectively. The simulated clock frequency is around 300Hz in steady-state
behavior.
The application of backgate steering in the ring oscillator and the buffers by
the output voltage of the converter generates a feedback loop. During start-up this
is a positive feedback loop that speeds up the start-up behavior. This is visible in
−
