Process control, PID and adaptive control - Intelligent Buildings and Building Automation - page 129

￿ Ideal parallel PID controller:

1

D de
dt

∫

ut () = K et () + etdt () +

(7-14)

p p

I

p

￿ Interacting PID controller:

⎡
⎢

⎤
⎥

1

etdt T de
dt

de
dt

⎡
⎢

⎤
⎥

∫

ut () = K et () + () + + T (7-15)

p d d

T

i

where K p is gain, T i and I p are integral settings of the controller, and T d and
D p are derivative settings of the controller.
Figure 7.13 shows the block diagram of a typical DDC loop. A digital
controller normally has a number of input channels and output channels.
Therefore, usually more than one DDC loop is controlled by one digital
controller.
Figure 7.14 shows the signals passing through a DDC loop. It can be
assumed that all the numbers that enter or leave the computer do so at the
same fixed period T, called sampling period or sampling time. The variables
r ( kT ), m ( kT ) and u ( kT ) are sequences of discrete signals in contrast to m ( t ),
c ( t ) and y ( t ), which are continuous functions of time. Data obtained for the
system variables only at discrete intervals is called sampled data.
If the sampling period chosen is very small compared to the time constant
of the process, the system is essentially continuous, and the methods used

Outpu t

D/A
converter

Reference
setting

Digital
processor

Actuator Process

Digital controller

A/D
converter

Sensor

Figure 7.13 Block diagram of a typical DDC loop.

Referenc e u(kT) Outpu t, y(t)

c(t)

D/A
converter

Actuator &
Process

Digital
processor

r(kT)

Analogue
to digital
converter

m(t)

m(kT)

Figure 7.14 Signals passing through a DDC loop.