Prototype 2: Volatile programs
The goal of this prototype is to refine the design and implementation of the
CPU in order to load instructions from the RAM and to fetch them in the
CPU. Assembler-like programs are thus hard-coded in the constructor of
class RAM and contain both data and instructions.
The system must be able to execute programs described using a simple
instruction set. The CPU processes instructions according to the fetch
execute sequence as described by the FSA depicted in Figure 5.3.
The instruction set that will be implemented in this prototype is set out in
The class structure for this iteration is the same as the one defined in the
previous phase. The main difference lies in the behaviour of the CPU, which
now executes instructions taken from the memory instead of a hard-wired
We define the behaviour of the CPU as described by the FSA depicted in
Figure 5.8. It is based on the instructions described in Table 5.3. This FSA
implements the fetch
execute cycle. Actually this is an extension of
the schematic FSA presented in Figure 5.3.
During the FETCH state the CPU issues a command to read the memory cell
addressed by the program counter (PC). When the RAM reads the memory
and issues an acknowledge command, the CPU enters the DECODE state.
During this state the CPU copies the instruction into the IR and examines it.
According to the instruction code, the CPU jumps to the appropriate state in
order to execute the instruction. Most instructions require just one state
Table 5.3 Instruction set of the second prototype
Halts the CPU
Jumps to the instruction at the given address
Jumps to the instruction at the given address if register A contains zero
Load register A with the content of the cell at address
Load register B with the content of the cell at address
Store the content of register A in the cell at address
Store the content of register B in the cell at address
Store the content of register A in the memory cell whose address is
contained in register B
Add the content of register A to the content of register B and put the result
into register A