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restrictive in reality, it makes perfect sense when we think of the purpose of
our system. We are interested in simulating Von Neumann architecture as a
whole, not the single components by themselves.
The computer provides a unitary view of the system. It is used to instan-
tiate the whole system and it represents the interface for starting and con-
trolling the simulation. The computer must provide a method for advancing
the simulation of a given number of steps.
5.4.2
Design
The classes that we use to model the computer architecture are the same as
those identified at the analysis level. The class diagram is shown in
Figure 5.5. The
Computer
class aggregates the other components, i.e. the
CPU
,
the
Bus
, and the
RAM
. Both the
CPU
and the
RAM
are connected to the
Bus
.
Decision point
How does the simulation evolve?
The simulation evolves in terms of computer steps. A step corresponds to
an atomic operation, e.g. the CPU reading data from the bus.
We want to be able to specify the number of steps of simulation that must
be executed. Thus, we need a way to trigger a single step of simulation for
each component. The method
execute()
of
CPU
and
RAM
serves this purpose.
Simulation can be performed as shown in the sequence diagram of Figure
5.6. The
Computer
class provides the user with a single functionality repre-
sented by method
simulate()
, which starts and controls the simulation.
The user requests the computer to perform one step of simulation, which
determines one step of simulation for each of the components, i.e. the CPU
and the RAM. The order of execution is also important. Since the CPU is the
master of the system it must execute its simulation step before the other
Computer
!
simulate()
CPU
BUS
RAM
0
bus
0
bus
0
data : String
0
command : String
0
address : int
!
execute()
!
execute()
!
dump()
Figure 5.5
Class diagram of the simulated Von Neumann architecture
