Java Reference
In-Depth Information
Bus
The CPU communicates with the other components of the system through
the system bus. The bus is made up of three components:
■
Command bus. It contains the commands issued by the CPU and the
confirmation messages from the other components of the computer.
■
Data bus. It contains the data exchanged between the CPU and the other
components.
■
Address bus. It contains the addresses of the memory cells to be read or
written.
The three buses hold data permanently and allow the components of the
system to read and write such data.
RAM
The RAM copies data from specific memory locations to the data bus when a
“read” request is found on the command bus. Similarly, it copies data from
the data bus into specific memory locations when a “write” request is found
on the command bus. The address of the memory location to be read or
written is retrieved from the address bus.
When the RAM has completed a read or write operation it sets the control
bus to the ACK value in order to acknowledge the CPU.
I
O devices
The keyboard, the display and the hard disk behave like the RAM. They read
or write data on the data bus when the corresponding commands are found
on the command bus. In particular, the keyboard writes on the data bus the
input received from the user. The display reads from the data bus the output
to be shown to the user. The hard disk stores data persistently even when
the computer is turned off.
5.2.2
Main features
We summarize here the main features emerging from the problem analysis.
Computer architecture
. The simulation tool must simulate the function-
alities of the basic components of the Von Neumann architecture.
■
Assembler-like programs
. The simulation tool executes programs written
in an assembler-like language. Programs are loaded from textual files into
the RAM and processed by the CPU.
■
Input
output interactions
. The computer interacts with the user through
simulated input
■
output devices.
5.2.3
Test
The main characteristics of the application to be tested are:
The interaction of the CPU with the RAM over the bus.
■
