Information Technology Reference
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code and temporal reference in the Group of Pictures (GOP) header of the MPEG-
2 video stream. The sub-encoders communicate with each other via Ethernet and
their start timing is controlled by a master sub-encoder. At the decoder, the master
sub-decoder adjusts the display timing of all the sub-decoders and accounts for
transmission delay by referring to the time code and temporal reference. The de-
coder can cope with the relative delay in the 4 TSs within 15 video frames. All
HDTV decoders in sub-decoders work synchronously using black burst as a
reference signal.
3.3 AVC/H.264-Based Codec
To achieve lower bit-rate coding for SHV with high-quality images, a codec sys-
tem based on the AVC/H.264 coding scheme has been developed. AVC/H.264 is
currently the most efficient standard video coding scheme and is widely used in
various applications, such as broadcasting small images for mobile reception or
HDTV services via a satellite network. Since there are no AVC/H.264 codecs for
images as large as SHV format ones, 16 HDTV AVC/H.264 codecs are used to
construct SHV codecs similar to the MPEG-2-based codecs.
Each HDTV AVC/H.264 codec conforms to Main Profile @ L4 and will be
able to handle High Profile in the future. The encoder consists of three field pro-
grammable gate array (FPGA) chips and one digital signal processor (DSP); there-
fore, the encoding process can be modified by replacing the encoder software. One
HDTV frame is divided into four slices and each slice is processed in parallel.
Motion estimation, which is conducted on FPGA chips, has two phases: pre-
motion estimation, which is a rough prediction on one whole HDTV frame with
two-pixel precision, followed by precise estimation on each of the four slices with
quarter-pixel precision. The DSP chip, used mainly for rate control, administers
the entire HDTV encoding processing module. The HDTV encoder is 1 rack unit
(RU) in size and has DVB-ASI output.
Frame synchronization of the 16 output images is the most important issue of
the system: therefore, a new synchronization mechanism was developed in which
one of the 16 encoders becomes a master and the other 15 encoders become
slaves. To synchronize the presentation time stamp (PTS) / decoding time stamp
DTS) and program clock reference (PCR) for MPEG-2 TS of the output streams,
all encoders share the same system date. The master encoder sends to all the other
encoders a “start” hardware signal and 27-MHz clock so that all the encoders' date
counters increment at the same rate. The signal for synchronization is transmitted
with a daisy-chained connection, and the master encoder automatically detects the
number of slave encoders using information on the signal. GOP synchronization is
also achieved. All encoders generate an intraframe when more than N encoders
detect a scene cut change. The value N is programmable and is usually set to nine.
When an encoder generates an intraframe independently of the other encoders, it
will generate the next intraframe at the beginning of GOP to maintain synchroni-
zation with the others encoders. The structure of the synchronization of the en-
coder units is depicted in Figure 9, and the codec systems themselves are shown in
Figure 10.
