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Bristol and incorporated in November 1978. Inmos ceased trading, and many staff
moved to SGS-Thomson (now STMicroelectronics) in April 1989 and was fully
absorbed by 1994 [18].
Fig. 3. A Transputer chip [19]
4 Alternatives to the Von Neuman Design - Triumph of
Algorithm over Heuristic
Each Inmos Transputer chip contained a processor, RAM storage and communication
ports. The chips were designed to be wired together in arrays. Whereas most single proc-
essor computers are limited to handling problems using sequential steps, parallel hardware
could solve problems faster by undertaking multiple computations simultaneously.
The question is, how can programmed solutions be stated in this new form? If a se-
quential language is used (such as the old FORTRAN code), a translator must identify
and exploit steps that can run simultaneously [20]. If a non-sequential language is
used instead, a different kind of approach is needed.
Some problems, such as weather forecasting or industrial product design, use
mathematical methods such as finite element mesh analysis [21], which map very
well onto processor arrays. Of course, using very high speed networks, the computer
array can be established as a virtual machine, and therefore multiple PCs can be used
for similar purposes using control software such as Beowulf clusters [22]. Explora-
tions into distributed processing architectures still continue [23].
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