Information Technology Reference
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includes identification and documentation of variability, and
(2)supportingactivitiesconcernedwithvariabilitybindingand
variability realization, which includes configuration of product
line members and derivation of these products. Typically,
(1) the variability and commonality analysis is performed
during the
domain engineering process
; (2) the variability
binding and variability realization is performed during the
application engineering process
.
A distinction is often made between
positive variability
and
negative variability
. In negative variability, the reference
architecture builds a product with all the features and a
mechanism is responsible to mask or remove non-selected
variants. This is a practical response, which is simple but not
really scalable. Mechanisms such as C macros (#define and
#ifdef) can be used for that. Positive variability is a much
more complex mechanism, which builds the product, in a
constructive way, with only the selected features. Most of the
existing mechanisms allow positive variability. Variability
is possible at any level of the software development process
and a convenient classification is
essential variability
and
technical variability
introduced by [POH 05b]. While essential
variability is related to the requirement of the client, technical
variability is that which occurs in the process of realizing it. In
the Smart-Home described earlier, the two first variabilities,
home architecture and smart-home facilities, are essential
variabilities, while software infrastructure is only a technical
variability. Since artifacts, products and even the product line
are evolving, we must consider
variation in time
, which is
the evolution and versions of artifacts along the time. Two
products may differ since they have different implementations
of the same features; this is
variation in space
.
The variability mechanisms can be classified according to
the software development steps or the main concepts they
address. A more comprehensive taxonomy of variability
realization techniques is described in [SVA 05]. For
requirements, we can use the use case notation from UML
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