Arithmetic Using Simulated Qubits - Brain Theory from a Circuits and Systems Perspective - page 121

A o and B o are fm bits; C 1 is a to bit. Proceeding in this way, using such nanocode
delivered from read-only memory, the entire priority calculation can be accom-
plished. Each operation is expected to require only a few milliseconds. So the end
result arrives well under a second, fast enough even for adverse conditions of
multiple returns from associative memory.

Determining Highest Priority

Integers are available, each a priority for a returned image (a candidate recall). The
problem at hand is to find the highest priority, and to use it to enable its
corresponding image to enter into consciousness. Rather than random logic as
delineated in a past chapter, it is desired to use the structured capabilities of
simulated qubits configured as toggles.
Priority selection may be demonstrated in a simple case assuming four numbers,
a, b, d, e.(“c” is not used here because it is reserved to represent the “carries” of
addition.) All are assumed to be binary numbers. Basically, to compare two
numbers, we subtract them and note whether the result is positive or not. Binary
subtraction may be accomplished by taking a 2's complement of the subtrahend and
then adding this to the minuend.
Consider b a. The 2's complement of a can be denoted as a 0 +1.This

symbolism means to complement each bit of a and then to add 1. Then add:
b + a 0 + 1. The carry out is one whenever b a.Ifb < a the carry out is 0. For

example, perform b 011.

The 2's complement of a is 101. Adding 100 and 101 results in 001 with a carry out
of 1. Therefore, since the carry out is one,

a for b ¼ 4 and a ¼ 3. In binary, b ¼ 100 and a ¼

b a :

Controlled toggles can determine whether or not b a as in Fig. 7.15 ,an

example kept simpler by assuming a precision N of 3 bits.
The priorities a, b reside in the registers holding the subject images. For priority
a the 2's complement is taken of a 2 a 1 a o as shown in the top left of the figure, which
complements bitwise the individual bits going to the A-input. For instance, if a o is
true, a toggle is applied to A o making it a false. The carry in, C in0 , serves to add 1,
effectively producing a 2's complement for the A-input (and output) of the revers-
ible adder.
The signals for image “b” are applied to the B-inputs of the reversible adder.
Effectively subtraction is done; the carry out is true if and only if b

a. All the
other output information is irrelevant. This implies simplifications in the adder
circuit that are of no concern at this point.
A similar circuit for d e.

Next it must be decided which is the largest among a, b, d, e by subtracting the
larger of a, b from the larger of d, e. This parallels the method of a past chapter. The

e can be used to determine whether or not d