Arithmetic Using Simulated Qubits - Brain Theory from a Circuits and Systems Perspective - page 120

Fig. 7.13 Overview
of priority calculations

Fig. 7.14 Possible layout for code words

Except for the B-lines, the lines in this figure represent registers of weighting
factors, each N bits. The number of weighting factors to be added for each returned
image is designated to be P, which requires P 1 reversible adders to arrive at a

grand sum, the desired priority value. The B-line is going to carry the accumulation,
so its bus must have about N + P lines.
The wiring diagrams show what must be accomplished by the programming
code taken from long-term memory. Space does not permit detailed code, nor do
you want to see it, but its main features are described below.

Programming for Additions

Each neural toggle qubit can be controlled by two fields, the to and the fm. Code
words flow from long-term memory as described in a previous chapter. Each
simulated qubit has its own to and fm. Imagine a code word with to and fm
connections to each toggle switch, as in Fig. 7.14 .
Each to-fm combination is a nano-operation. The first code will be to transfer
a 0 ! A 0 . The a-toggles are on the right; the A-toggles are in the middle. The code

for the first bit a 0 is 00 0001.

a 0 is the fm bit; A 0 is the to bit. At some point appropriate inputs will have been
applied to the adder, and it is time to add. To compute the carry out of A 0 + B 0 , for
instance, which is A 0 B 0 , and to place it in a scratch qubit C 1 , that is, A 0 B 0 !

0000 0000 0010 0000

... ... ... ... ...

C 1 ,

apply the code 00 1000 0001 0001 0000 0000.

... ... ... ... ...