Information Technology Reference
In-Depth Information
Self-Study Exercises
(If you desire to keep a record of your efforts, please show a couple of logical steps
leading to the answers.)
Cue Editor Logic
1. Concerning Block U4, 5, 6:
(a) Provide a timing diagram that illustrates the Boolean logical functions
involved.
(b) Comment on pulse synchronization requirements for neural gates. (HINT:
Focus only on the AND gate.)
(c) Explain how the NOT gate works in Blocks U4, 5, 6. (HINT: Use neuro-
transmitter diagrams as given in a previous chapter.)
2. Provide a schematic to show exactly what is meant by a bus with K
¼
5. (HINT:
Show five vertical lines that break out from bus notation with /5.)
3. Are bus conductors most likely to be axons or dendrites? (ANS. Axons are
longer and transmit signals faster, so are more probable.)
4. Identify each signal in the proposed cue editor, and its purpose (refer to “ Attach-
ment 1 ” section).
5. Create a timing diagram for Fig. 5.2 , the subcircuit for cue editing. (HINT:
Assume that all pulses can be appropriately synchronized: 1 ms per gate; 10 ms
per simulated qubit; and 10 ms for long-term memory search.)
Probabilistic Simulated Qubits
6. A multivibrator at frequency f 1 produces a pulse width
. Predict the probability
τ
of a true occurring under the following conditions:
(a) Frequency is at its maximum of f 1 and an ideal sampling pulse whose width
is much less than
is available. (ANS. average probability of a true is 50%.)
(b) An ideal sampling pulse whose width is much less than
τ
is available and
frequency is reduced by about 10%. (ANS. average probability of a true is
about 45%.)
(c) Repeat the above estimations using a sampling pulse of width of 2
τ
. (ANS.
τ
average probability of a true remains at 50%.)
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