Digital Signal Processing Reference
In-Depth Information
Source code at the input:
1 0 1 1 0 0 0
Encoded bit sequence (transmitted ):
11 00 01 01 11 00 00
Error vector (assumed):
0
1
00
1
0 00 00 00 00
Received sequence (erroneous):
1
0
10
1
0 01 01 11 00
a
b
Error
Error
1
0
10
1
0
01
01
00
1
0
10
1
0
01
01
11
00
11
1
2
3
4
5
5
5
5
4
5
6
3
4
00
00
2
1
3
4
4
1
2
3
4
01
01
3
4
10
10
1
3
11
11
c
d
Error
Error
1
0
1
0
10
1
0
01
01
11
00
10
1
0
01
01
11
00
5
6
6
6
6
5
8
7
6
6
6
10
8
8
7
8
7
8
00
00
5
6
01
01
5
8
10
10
6
7
11
11
1/10
e
Error
11
1
0
10
1
0
01
01
11
00
10
12
8
10
10
9
9
9
9
0/10
00
01
10
8
01
1/00
8
10
00
8
11
0/00
Illustration 254:
VITERBI decoding
VITERBI decoding is carried out to ensure error-free reception of the bit pattern sequence. The state
diagram shows that the bit pattern in this sequence cannot have been generated by the convolutional
encoder, i.e. it recognises immediately that a bit must be wrong in this case. However, as it is not clear
which of the two bits must be wrong, both possibilities are investigated. The paths diverge. The “sum of the
correct bits” is registered at the trellis points.
Two different paths may intersect at a trellis point. The path with the smaller “sum of correct bits” is
deleted. Thus gradually the path with the greatest likelihood emerges. It is in fact identical with the path
for the correct sequence of bits in Illustration 253. The details are described more closely in the text.
