Image Processing Reference
In-Depth Information
8.7 Summary
This chapter has considered a range of issues that arise in the practical implementa-
tion of the techniques described earlier in the topic. The first part concerned enve-
lope filters, which are a useful technique for reducing the rare gross errors that can
occur in certain types of filters. The remainder of the chapter has been concerned
with hardware implementation. No matter how well the methods work, they will
not be widely adopted if there are serious problems with implementation.
While the techniques appear to map to hardware in a straightforward way, they
do not in general scale well. Small increases in window size and bit depth can cause
very rapid increases in the hardware required making it impractical in some situa-
tions. A number of smarter methods for implementation including bit-serial ap-
proaches and bit-vector architecture have been presented that result in efficient
implementations.
References
1
Vo Ba-Ngu Vo, Antonio, C., “Continuous-time envelope constrained filter de-
sign with input uncertainty,” ICASSP98 , 3 , 1289-1293 (1998).
2
K. L. Teo, A. Cantoni, and X. G. Lin, “A new approach to the optimization of
envelope-constrained filters with uncertain input,” IEEE Transactions on Sig-
nal Processing , 42 (2), 426-429 (1994).
3
W. X. Zheng, A. Cantoni, and K. L. Teo, “Robust design of envelope-
constrained filters in the presence of input uncertainty,” IEEE Transactions on
Signal Processing , 44 (8), 1872-1877 (1996).
4
C. H. Tseng, K. L. Teo, A. Cantoni, and Z. Zang, “Envelope-constrained fil-
ters: adaptive algorithms,” IEEE Transactions on Signal Processing , 48 (6),
1597-1608 (2000).
5
M. Brun, R. Hirata Jr., J. Barrera, and E. R. Dougherty, “Nonlinear filter design
using envelopes,” J. Math. Imaging Vis ., 21 (1), 81-97, 2004.
6
A. Gasteratos, I. Andreadis, and P. Tsalides, “Improvement of the majority
gate algorithm for gray-scale dilation/erosion,” Electronics Letters, 32 (9),
806-807 (1996).
7
A. Gasteratos, I. Andreadis, and P. Tsalides, “Extension and very large scale
integration implementation of the majority-gate algorithm for gray-scale mor-
phological operations,” Opt. Eng. , 36 (3), 857-861 (1997).
8
A. Gasteratos, I. Andreadis, and P. Tsalides, “Realisation of soft morphologi-
cal filters,” IEE Proceedings - Circuits Devices and Systems , 145 (3), 201-206
(1998).
9
A. Gasteratos and I. Andreadis, “Non-linear image processing in hardware,”
Pattern Recognition , 33 (6), 1013-1021 (2000).
10
I. Diamantaras and S. Y. Kung, “A linear systolic array for real-time morpho-
logical image processing,” J. VLSI Signal. Proc. , 17 (1), 43-55 (1997).
Search WWH ::




Custom Search