Embedded Java - JavaTech: An Introduction to Scientific and Technical Computing with Java

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including floating-point, with extended bytecodes for I/O and threading operations. It

can also implement custom bytecodes for special operations. The processor core comes

with 48 KB internal memory (16 KB for microcode and 32 KB for data) and can access

up to 250 MB external RAM via an 8-bit, 16-bit, or 32-bit interface. It includes dual

UARTs, five 8-bit I/O ports, and other I/O features.

It is suitable for real-time operations and supports the RTSJ. It offers a hard real-time

multithreading kernel with synchronization and deterministic scheduling queues. The

thread yield, wait, notify, and monitor enter/exit operations are implemented directly

with extended bytecodes so a RTOS (Real-Time Operating System) is not needed to

manage the threads. A thread will yield to another within 1 microsecond.

The system can implement the J2ME Connected Limited Device Configuration

(CLDC) and, for wireless systems, can run MIDlets. Two independent applications

can run simultaneously with no interference as if they were operating in two separate

JVMs. A timer allocates time slices to each JVM and a separate timer is used by each

JVM for thread time slices.

The aJ-80 provides essentially the same features as the aJ-100 but offers only an

8-bit memory interface with corresponding slower I/O.

Imsys Cjip processor - the Cjip processor provides a complete Java instruction set,

including floating-point operations [15]. The chip allows for reconfiguring of inter-

nal microcode (even in real-time), and most Java bytecodes are implemented in the

microcode. Instruction sets for C/C ++ and assembler are also included. The system

offers Virtual Peripherals (VPs), which perform tasks normally requiring external cir-

cuitry and include timers, I/O, graphics processing and many other services. A VP is

loaded at the microcode level and allows for fast, deterministic performance. J2ME in

the CLDC configuration and MIDP profile is supported. (More about Imsys systems in

Sections 24.8.2 and 24.10.)

Javelin Stamp Interpreter Chip (Parallax) - this chip is sold separately or as part of

the Javelin Stamp, which comes in a 24-pin DIP (Dual In-Line Package) module. The

Javelin Stamp is discussed further in Sections 24.8.4 and 24.9 and shown in Figure 24.1.

The Stamp module is nearly a complete computer system with only the need for power

and a serial line to begin computing. The Java code runs in a version of the Ubicom

SX48BD microcontroller chip. The chip translates a subset of Java bytecodes into the

SX48 instructions and executes them. The interpreter chip is now available for those

whowant to use it separately from the Javelin Stamp [16,17].

JA108 (Nazomi) - this processor comes in a standard 16-bit SRAM/FLASH memory

package and plugs into the SRAM bus. It then acts as a co-processor to accelerate Java

programs and multimedia applications [18].

Figure 24.1 The

Javelin Stamp

module comes as a

24-pin DIP package.