Hardware Reference
In-Depth Information
main component of the motherboard and is the only motherboard circuit besides the processor that
normally runs at full motherboard (processor bus) speed. Most modern chipsets use a single-chip
North Bridge; however, some of the older ones actually consisted of up to three individual chips to
make up the complete North Bridge circuit.
The South Bridge is the lower-speed component in the chipset and has always been a single chip. The
South Bridge is a somewhat interchangeable component in that different chipsets (North Bridge chips)
often are designed to use the same South Bridge component. This modular design of the chipset
allows for lower cost and greater flexibility for motherboard manufacturers. Similarly, many vendors
produce several versions of pin-compatible South Bridge chips with different features to enable more
flexible and lower-cost manufacturing and design.
The South Bridge connects to the 33MHz PCI bus and contains the interface or bridge to the 8MHz
ISA bus (if present). It also typically contains dual ATA/IDE hard disk controller interfaces, one or
more USB interfaces, and in later designs even the CMOS RAM and real-time clock functions. In
older designs, the South Bridge contained all the components that make up the ISA bus, including the
interrupt and DMA controllers.
The third motherboard component, the Super I/O chip, is connected to the 8MHz ISA bus or the low
pin count (LPC) bus and contains all the standard peripherals that are built into a motherboard. For
example, most Super I/O chips contain the serial ports, parallel port, floppy controller, and
keyboard/mouse interface. Optionally, they might contain the CMOS RAM/clock, IDE controllers,
and game port interface as well. Systems that integrate IEEE 1394 and SCSI ports use separate chips
for these port types.
Most recent motherboards that use North/South Bridge chipset designs incorporate a Super-South
Bridge, which incorporates the South Bridge and Super I/O functions into a single chip.
Hub Architecture
Beginning in 1999, chipsets from Intel began using hub architectures in which the former North
Bridge chip is now called a Memory Controller Hub (MCH) or an I/O Hub (IOH) and the former
South Bridge is called an I/O Controller Hub (ICH). Systems that include integrated graphics use a
Graphics Memory Controller Hub (GMCH) in place of the standard MCH. Rather than being
connected through the PCI bus as in a standard North/South Bridge design, they are connected via a
dedicated hub interface that is at least twice as fast as PCI. The hub design offers several advantages
over the conventional North/South Bridge design:
•
It's faster
—The Accelerated Hub Architecture (AHA) interface that the 8xx series uses has
twice the throughput of PCI. The 9xx and newer series chipsets use an even faster version
called DMI (Direct Media Interface), which is 7.5 to 14 times faster than PCI.
•
Reduced PCI loading
—The hub interface is independent of PCI and doesn't share or steal PCI
bus bandwidth for chipset or Super I/O traffic. This improves performance of all other PCI
bus-connected devices because the PCI bus is not involved in these transactions.
•
Reduced board wiring
—The AHA interface is 8 bits wide and requires 15 signals to be routed
on the motherboard, whereas DMI is 4 bits wide and requires 8 differential pairs of signals. By
comparison, PCI requires that no fewer than 64 signals are routed on the board, causing
increased electromagnetic interference (EMI) generation, greater susceptibility to signal
degradation and noise, and increased board manufacturing costs.
