Hardware Reference
In-Depth Information
AMD “Bulldozer” and “Piledriver” FX Processors
AMD introduced its follow-up to its K10 architecture, the Bulldozer architecture, in October 2011.
Although FX processors in this family use the same Socket AM3+ as late-model K10 processors do,
the internal design of Bulldozer processors is very different from its predecessors.
Note
Bulldozer is also known as K11, but Bulldozer is the more common name for this architecture.
Bulldozer processors are modular. Each module contains a single L1 instruction cache, a multi-
branched instruction decoder, and a multilayer dispatch controller. The dispatch controller is
connected to two integer processing clusters and a single floating point unit. The results are connected
to a write coalescing cache, a core interface unit, and up to 2MB of L2 cache. A module is commonly
referred to as a dual-core processor, although only the integer clusters are dualed (see
Figure 3.44
).
A Bulldozer CPU includes 8MB of L3 cache memory, and Bulldozer CPUs were manufactured in
eight-core, six-core, and four-core versions, known collectively as Zambezi.
