Digital Signal Processing Reference
In-Depth Information
2
read at output rate: 4.96 Gbit/s.
Total: 7.44 Gbit/s
this is a 30% reduction in DDR memory
bandwidth. This should give you an appreciation of why many
video designs will chroma subsample and upsample many times
)
e
so that they can minimize precious memory and bandwidth
resources.
Since in a majority of designs you will be dealing with 4:2:2
video we will use the second number of 7.44 Gbit/s.
Frame buffers are easy to calculate as they just read a frame
and write a frame
the memory bandwidth calculation is simply
e
1920
60 fps.
Now let's introduce a real-life constraint. We are using 20-bit
YCbCr video data that has been sampled in the 4:2:2 sampling
scheme, but what if we are using an external memory with 256-bit
data bus? There is a mismatch.
This means that during each burst to the external memory, we
are only able to transmit or receive 12 pixels (or 240 bits) total.
This indicates that, for each transfer, 16 bits are wasted. Or you
could describe this as 1.33 bits wasted for every pixel transmitted/
received.
In the same fashion, with 10-bit motion values, only 25 motion
values can be transmitted/received during each burst. Therefore,
for each transfer, 6 bits are wasted, or 0.24 of a bit is wasted for
every motion value transferred/received.
Therefore we must recalculate the memory bandwidth
for both the deinterlacer and the framebuffer as shown in
Table 20.1
.
After we figure out the penalties for each burst of video data and
motion values, we are able to compute the worst-case external-
memory bandwidth requirement for each IP. To do that, we first
calculate thememory requirement for the worst-case input/output
format and motion values. Then we sum up the bandwidth
requirement for eachwrite/read port. In this case, for eachmotion-
adaptive deinterlacer, with the motion-bleed option on, the worst-
case requirement is 7.909 Gbits/second. Each frame buffer also
requires externalmemory bandwidth of 5.308 Gbits/second. It does
not significantly change the numbers
1080
20 bits
but it is an important
consideration when designing real-life video signal chains.
Since we have two video paths in the design that we started
with, we need two deinterlacers and two frame buffers. The
total worst-case system memory bandwidth requirement
e
is
26.434 Gbits/sec, as shown in
Table 20.2
.
If you are using a DDR2 memory running at 267 Mhz, your
theoretical peak memory bandwidth possible is:
266.7 MHz
64 bits
2 (both clock edges used)
34.133 Gbit/s
ΒΌ
