a single clock tick. Finer compiler optimization techniques, out-of-order execution, predictive
branching, VLIW, etc., allow us to obtain better and better performance from processors. However
good these methods are, they still have their limits.
One of the major limiting factors is the problem of limited bus, memory, and peripheral speeds.
We can build CPUs today that operate at 600 MHz, but we can't build communications buses that
operate at the same speed. RAM speeds are also falling further behind the demands of the CPUs.
It is expensive to build 600-MHz CPUs, but as there are only a few in a system, it is affordable.
To build memory that can keep up with these speeds would be prohibitively expensive. A great
many machines today implement two- and even three-level caches to deal with this problem
(single-level caches weren't enough!). Multilevel caches work effectively with well-behaved
programs, where sequential data and instruction references are likely to be physically adjacent in
memory. But truly random-access programs wreak havoc on this scheme, and we can point to any
number of programs that run faster on slower machines that lack that second-level cache.
None of the issues addressed above play favorites with any manufacturers. Sun, Intel, HP, IBM,
SGI, DEC, etc., have come up with techniques for dealing with them. Some techniques have
proven to be more effective than others, but none of them avoids the fundamental limitations of
physics. Nature is a harsh mistress.
This is where SMP comes into play. It is one more weapon in our arsenal for performance. Just as
the foregoing techniques have allowed us to increase our single-CPU performance, SMP allows us
to increase our overall system performance. And that's what we really care about--overall system
performance. As one customer put it, "SMP, superscalar--buzzwords! I don't care if you have
little green men inside the box! I want my program to run faster!"
We can build 64-processor machines today (e.g., the Cray CS6400) that will yield 64 times the
performance of a single-processor machine (on some problems). The cost of that 64-CPU machine
is a fraction of the cost of 64 single-processor machines. In a 64-way SMP machine, all 64
processors share the system costs: chassis, main memory, disks, software, etc. With 64
uniprocessors, each processor must have its own chassis, memory, etc. This fact makes SMP
highly attractive for its price/performance ratio. An additional attraction of SMP is that it is also
possible to purchase a machine with a small number of CPUs and add more CPUs as demands
(and budgets) increase. In Figure 1-1, these advantages of SMP are clear.
Figure 1-1. Performance for Digital's Alpha Servers (8400 5/625)
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