SIGNED NUMBER CONCEPTS AND ARITHMETIC OPERATIONS

SECTION 6.2: SIGNED NUMBER CONCEPTS AND ARITHMETIC OPERATIONS
All data items used so far have been unsigned numbers, meaning that the entire 8-bit operand was used for the magnitude. Many applications require signed data. In this section the concept of signed numbers is discussed along with related instructions. If your applications do not involve signed numbers, you can bypass this section.
Concept of signed numbers in computers
In everyday life, numbers are used that could be positive or negative. For example, a temperature of 5 degrees below zero can be represented as -5, and 20 degrees above zero as +20. Computers must be able to accommodate such numbers. To do that, computer scientists have devised the following arrangement for the representation of signed positive and negative numbers: The most significant bit (MSB) is set aside for the sign (+ or -), while the rest of the bits are used for the magnitude. The sign is represented by 0 for positive (+) numbers and 1 for negative (-) numbers. Signed byte representation is discussed below.
Signed 8-bit operands
In signed byte operands, D7 I (MSB) is the sign and DO to D6 are set aside for the magnitude of the number. If D7 = 0, the operand is positive, and if D7 = 1, it is negative.
Figure 6-2. 8-Bit Signed Operand
Positive numbers
The range of positive numbers that can be represented by the format shown in Figure 6-2 is 0 to +127. If a positive number is larger than +127, a 16-bit size operand must be used. Since the 8051 does not support 16-bit data, we will not discuss it.
Negative numbers
For negative numbers, D7 is 1; however, the magnitude is represented in its 2′s complement. Although the assembler does the conversion, it is still important to understand how the conversion works. To convert to negative number representation (2′s complement), follow these steps.
  1. Write the magnitude of the number in 8-bit binary (no sign).
  2. Invert each bit.

    3. Add 1 to it.









    Example 6-10
    Example 6-11
    Example 6-12
    Examples 6-10, 6-11, and 6-12 demonstrate these three steps.

    From the examples above it is clear that the range of byte-sized negative numbers is -1 to -128. The following lists byte-sized signed number ranges:


    The above explains the mystery behind the relative address of-128 to +127 in the short jump discussed in Chapter 3.
    Overflow problem in signed number operations
    When using signed numbers, a serious problem arises that must be dealt with. This is the overflow problem. The 8051 indicates the existence of an error by raising the OV (overflow) flag, but it is up to the programmer to take care of the erroneous result. The CPU understands only Os and Is and ignores the human convention of positive and negative numbers. What is an overflow? If the result of an operation on signed numbers is too large for the register, an overflow has occurred and the programmer must be notified. Look at Example 6-13.
    Example 6-13
    Examine the following code and analyze the result.

    According to the CPU, the result is -90, which is wrong. The CPU sets OV = 1 to indicate the overflow.
    In Example 6-13, +96 is added to +70 and the result according to the CPU was -90. Why? The reason is that the result was larger than what A could contain.

    Like all other 8-bit registers, A could only contain up to +127. The designers of the CPU created the overflow flag specifically for the purpose of informing the programmer that the result of the signed number operation is erroneous.
    When is the OV flag set?
    In 8-bit signed number operations, OV is set to 1 if either of the following two conditions occurs:
    1. There is a carry from D6 to D7 but no carry out of D7 (CY = 0).
    2. There is a carry from D7 out (CY = 1) but no carry from D6 to D7.
    In other words, the overflow flag is set to 1 if there is a carry from D6 to D7 or from D7 out, but not both. This means that if there is a carry both from D6 to D7 and from D7 out, OV = 0. In Example 6-13, since there is only a carry from D6 to D7 and no carry from D7 out, OV = 1. Study Examples 6-14,6-15, and 6-16 to understand the overflow flag in signed arithmetic.
    Example 6-14


    According to the CPU, the result is +126, which is wrong (OV = 1).
    Example 6-15
    Observe the following, noting the OV flag.


    Observe the following, noting the role of the OV flag.

    Example 6-16




    From the above examples we conclude that in any signed number addition, OV indicates whether the result is valid or not. If OV = 1, the result is erroneous; if OV = 0, the result is valid. We can state emphatically that in unsigned number addition we must monitor the status of CY (carry flag), and in signed number addition, the OV (overflow) flag must be monitored by the programmer. In the 8051, instructions such as JNC and JC allow the program to branch right after the addition of unsigned numbers, as we saw in Section 6.1. There is no such instruction for the OV flag. However, this can be achieved by “JB PSW.2″ or “JNB PSW.2″ since PSW, the flag register, is a bit-addressable register. This is discussed later in this chapter.
    Instructions to create 2′s complement
    The 8051 does not have a special instruction to make the 2′s complement of a number. To do that, we can use the CPL (complement) instruction and ADD, as shown next.
CPL A ; 1′s complement (Invert)
ADD A,#l ; add 1 to make 2′s complement

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