PIN DESCRIPTION OF THE 8051

This chapter describes the process of physically connecting and testing 8051-based systems. In the first section we describe the function of the pins of 8051 chip. The second section shows the hardware connection for an 8051 Trainer using the DS89C4xO (DS89C420/30/40/50) chip. It also shows how to download programs into a DS89C4xO-based system using PC Hyper Terminal. In Section 8.3 we explain the characteristics of the Intel hex file.

SECTION 8.1: PIN DESCRIPTION OF THE 8051



Figure 8-1. 8051 Pin Diagram

Although 8051 family members (e.g., 8751, 89C51, 89C52, DS89C4xO) come in different packages, such as DIP (dual in-line package), QFP (quad flat package), and LLC (leadless chip carrier), they all have 40 pins that are dedicated to various functions such as I/O, RD, WR, address, data, and interrupts. It must be noted that some companies provide a 20-pin version of the 8051 with a reduced number of I/O ports for less demanding applications. However, since the vast majority of developers use the 40-pin chip, we will concentrate on that. Figure 8-1 shows the pins for the 8051 52. For the 8052 chip some of the pins have extra functions and they will be discussed as we study them.


Examining Figure 8-1, note that of the 40 pins, a total of 32 pins are set aside for the four ports PO, PI, P2, and P3, where each port takes 8 pins. The rest of the pins are designated as Vcc, GND, XTAL1, XTAL2, RST, EA, PSEN, and ALE. Of these pins, six (Vcc, GND, XTAL1, XTAL2, RST, and EA) are used by all members of the 8051 and 8031 families. In other words, they must be connected in order for the system to work, regardless of whether the microcontroller is of the 8051 or 8031 family. The other two pins, PSEN and ALE, are used mainly in 8031-based systems. We first describe the function of each pin. Ports are discussed separately.

Vcc

Pin 40 provides supply voltage

to the chip. The voltage source is +5V. Figure
8.2
(a)
XTAL
Connection
to
8051

GND

Pin 20 is the ground. XTAL1 and XTAL2


The 8051 has an on-chip oscillator but requires an external clock to run it. Most often a quartz crystal oscillator is connected to inputs XTAL1 (pin 19) and XTAL2 (pin 18). The quartz crystal oscillator connected to XTAL1 and XTAL2 also needs two capacitors of 30 pF value. One side of each capacitor is connected to the ground as shown in Figure 8-2 (a).


It must be noted that there are various speeds of the 8051 family. Speed refers to the maximum oscillator frequency connected to XTAL. For


example, a 12-MHz chip must be connected to a crystal with 12 MHz frequency or less. Likewise, a 20-MHz microcontroller requires a crystal frequency of no more than 20 MHz. When the 8051 is connected to a crystal oscillator and is powered up, we can observe the frequency on the XTAL2 pin using the oscilloscope.


If you decide to use a frequency source other than a crystal oscillator, such as a TTL oscillator, it will be connected to XTAL1; XTAL2 is left unconnected, as shown in Figure 8-2 (b).

RST

Pin 9 is the RESET pin. It is an input and is active high (normally low). Upon applying a high pulse to this pin, the microcontroller will reset and terminate

all activities. This is often referred to as a power-on reset. Activating a power-on reset will cause all values in the registers to be lost. It will set program counter to all Os.


Figures 8-3 (a) and (b) show two ways of connecting the RST pin to the power-on reset circuitry. Figure 8-3 (b) uses a momentary switch for reset circuitry.

In order for the RESET input to be effective, it must have a minimum duration of two machine cycles. In other words, the high pulse must be high for a minimum of two machine cycles before it is allowed to go low. Here is what the Intel manual says about the Reset circuitry: “When power is turned on, the circuit holds the RST pin high for an amount of time that depends on the capacitor value and the rate at which it charges. To ensure a valid reset the RST pin must be held high long enough to allow the oscillator to start up plus two machine cycles.” Although, an 8.2K-ohm resistor and a 10-uF capacitor will take care of the vast majority of the cases, you still need to check the data sheet for the 8051 you are using.

EA

The 8051 family members, such as the 8751/52, 89C51/52, or DS89C4xO, all come with on-chip ROM to store programs. In such cases, the EA pin is connected to Vcc. For family members such as the 8031 and 8032 in which there is no on-chip ROM. code is stored on an external ROM and is fetched by the 8031/32. Therefore, for the 8031 the EA pin must be connected to GND to indicate that the code is stored externally. EA. which stands for “external access,” is pin number 31 in the DIP packages. It is an input pin and must be connected to either Vcc or GND. In other words, it cannot be left unconnected.


In Chapter 14, we will show how the 8031 uses this pin along with PSEN to access programs stored in ROM memory located outside the 8031. In 8051 chips with on-chip ROM, such as the 8751/52, 89C51/52, or DS89C4xO, EA is connected to Vcc, as we will see in the next section.



The pins discussed so far must be connected no matter which family member is used. The next two pins are used mainly in 8031-based systems and are discussed in more detail in Chapter 14. The following is a brief description of each.

PSEN


This is an output pin. PSEN stands for “program store enable.” In an 8031-based system in which an external ROM holds the program code, this pin is connected to the OE pin of the ROM. See Chapter 14 to see how this is used.

ALE

ALE (address latch enable) is an output pin and is active high. When connecting an 8031 to external memory, port 0 provides both address and data. In other words, the 8031 multiplexes address and data through port 0 to save pins. The ALE pin is used for demultiplexing the address and data by connecting to the G pin of the 74LS373 chip. This is discussed in detail in Chapter 14.

Ports 0, 1, 2 and 3

As shown in Figure 8-1 (and discussed in Chapter 4), the four ports PO, PI, P2, and P3 each use 8 pins, making them 8-bit ports. All the ports upon RESET are configured as input, since PO – P3 have value FFH on them. The following is a summary of features of PO – P3 based on the materials in Chapter 4.

PO



Figure 8-4. Port 0 with Pull-Up Resistors

As shown in Figure 8-1. port 0 is also designated as ADO – AD7, allowing it to be used for both address and data. When connecting an 8051/31 to an external n”.e:r.ory. port 0 provides both address and data. The 8051 multiplexes address and data through port 0 to save pins. ALE indicates if PO has address or data. When ALE = 0. it provides data DO – D7. but when ALE = 1 it has address AO -A”. Therefore. ALE is used for demuliplexing address and data with the help of a “4LS373 latch, as we will see in Chapter 14. In the 8051-based systems where there is no external memory connection, the pins of PO must be connected externally to a 1 OK-ohm pull-up resistor. This is due to the fact that PO is an open drain, unlike PI. P2. and P3. Open drain is a term used for MOS chips in the same way that open collector is used for TTL chips. In many systems using the 8751. 89C51. or DS89C4xO chips, we normally connect PO to pull-up resistors. See Figure 8-4. With external pull-up resistors connected to PO, it can be used as a simple I/O port, just like PI and P2. In contrast to port 0, ports PI, P2, and P3 do not need any pull-


up resistors since they already have pull-up resistors internally. Upon reset, ports PI, P2, and P3 are configured as input ports.

P1 and P2

In 8051-based systems with no external memory connection, both PI and P2 are used as simple I/O. However, in 8031/51-based systems with external memory connections, port 2 must be used along with PO to provide the 16-bit address for the external memory. As shown in Figure 8-1, port 2 is also designated as A8 – A15, indicating its dual function. Since an 8031/51 is capable of accessing 64K bytes of external memory, it needs a path for the 16 bits of the address. While PO provides the lower 8 bits via AO – A7, it is the job of P2 to provide bits A8 – A15 of the address. In other words, when the 8031/51 is connected to external memory, P2 is used for the upper 8 bits of the 16-bit address, and it cannot be used for I/O. This is discussed in detail in Chapter 14.


From the discussion so far, we conclude that in systems based on 8051 microcontrollers, we have three ports, PO, PI, and P2, for I/O operations. This should be enough for most microcontroller applications. That leaves port 3 for interrupts as well as other signals, as we will see next.

Port3

Port 3 occupies a total of 8 pins, pins 10 through 17. It can be used as input or output. P3 does not need any pull-up resistors, the same as PI and P2 did not. Although port 3 is configured as an input port upon reset, this is not the way it is most commonly used. Port 3 has the additional function of providing some extremely important signals such as interrupts. Table 8-1 provides these alternate functions of P3. This information applies to both 8051 and 8031 chips.


P3.0 and P3.1 are used for the RxD and TxD serial communications signals. See Chapter 10 to see how they are connected. Bits P3.2 and P3.3 are set aside for external interrupts, and are discussed in Chapter 11. Bits P3.4 and P3.5 are used for Timers 0 and 1, and are discussed in Chapter 9. Finally, P3.6 and P3.7 are used to provide the WR and RD signals of external memory connections. Chapter 14 discusses how they are used in 8031-based systems. In systems based on the 8051, pins 3.6 and 3.7 are used for I/O while the rest of the pins in port 3 are normally used in the alternate function role.

Table 8-1: Port 3 Alternate Functions

P3 Bit Function Pin


Program counter value upon reset


Activating a power-on reset will cause all values in the registers to be lost. Table 8-2 provides a partial list of 8051 registers and their values after power-on reset. From Table 8-2 we note that the value of the PC (program counter) is 0 upon reset, forcing the CPU to fetch the first opcode from ROM memory location 0000. This means that we must place the first byte of opcode in ROM location 0 because that is where the CPU expects to find the first instruction.

Table 8-2: RESET Value of Some 8051 Registers



Machine cycle and crystal frequency

reason we say “almost” is that the number of machine cycles it takes to execute an instruction is not the same for the AT89C51 andDS89C4xO chips as we discussed in Chapter 3.


As we discussed in Chapter 3, the 8051 uses one or more machine cycles to execute an instruction. The period of machine cycle varies among the different versions of 8051 from 12 clocks in the AT89C51 to 1 clock in the DS89C4xO chip. See Table 8-3. The frequency of the crystal oscillator connected to the X – X2 pins dictates the speed of the clock used in the machine cycle. From Table 8-3, we can conclude that using the same crystal frequency of 12 MHz for both the AT89C51 and DS89C4xO chips gives performance almost 12 times better from the DS89C4xO chip. The

Table 8-3: Clocks per Machine Cycle (MC) for

Various 8051 Versions



Example 8-1

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