PARALLEL AND SERIAL ADC

Step size (resolution) is the smallest change that can be discerned by an ADC.

1. Make CS = 0 and send a low-to-high pulse to pin WR to start the conversion.
   
   1. Keep monitoring the INTR pin. If INTR is low, the conversion is finished and
      we can go to the next step. If INTR is high, keep polling until it goes low.
      
   2. After the INTR has become low, we make CS = 0 and send a high-to-low pulse
      to the RD pin to get the data out of the ADC0804 1C chip. The timing for this
      process is shown in Figure 13-2.
      

   
   
   
   

   Clock source for ADC0804
   
   Figure 13-3. 8051 Connection to ADC0804 with Self-Clocking
   

   
   

   Figure 13-4. 8051 Connection to ADC0804 with Clock from XTAL2 of the 8051
   
   The speed at which an analog input is converted to the digital output depends on the speed of the CLK input. According to the ADC0804 datasheets, the typical operating frequency is approximately 640 kHz at 5 volts. Figures 13-3 and 13-4 show two ways of providing clock to the ADC0804. In Figure 13-4, notice that the clock in for the ADC0804 is coming from the crystal of the microcontroller. Since this frequency is too high, we use D flip-flops (74LS74) to divide the frequency. A single D flip-flop divides the frequency by 2 if we connect its Q to the D input. For a higher-frequency crystal, you can use 4 flip-flops.
   
   
   

   
   

   Programming ADC0804 in Assembly
   
   Examine the ADC0804 connection to the 8051 in Figure 13-4. The following program monitors the INTR pin and brings an analog input into register A. It then calls hex-to-ASCII conversion and data display subroutines.
   

   
   

   For hex-to-ASCII conversion and data display, see Chapters 6 and 12, respectively.
   
   Programming ADC0804 in C
   
   The 8051 C version of the above program is given below.
   
   
   

   
   
   
   

   ADC0808/0809 chip with 8 analog channels
   
   Another useful chip is the ADC0808/0809 from National Semiconductor. See Figure 13-5. While the ADC0804 has only one analog input, this chip has 8 of them. The ADC0808/0809 chip allows us to monitor up to 8 different analog inputs using only a single chip. Notice that the ADC0808/0809 has an 8-bit data output just like the ADC804. The 8 analog input channels are multiplexed and selected according to Table 13-3 using three address pins, A, B, and C.
   
   In the ADC0808/0809, V_ret<+) and V_ref{-) set the reference voltage. If V_ref(-) = Gnd and V_ref(+) = 5 V, the step size is 5 V/256 = 19.53 mV. Therefore, to get a 10 mV step size we need to set V_ref{+) = 2.56 V and V_ref{-) = Gnd. From Figure 13-5, notice the ALE pin. We use A, B, and C addresses to select INO – IN7, and activate ALE to latch in the address. SC is for start conversion. SC is the same as the WR pin in other ADC chips. EOC is for end-of-conversion, and OE is for output enable (READ). The EOC and OE are the same as the INTR and RD pins repectively. Table 13-4 shows the step size relation to the V_ref voltage. Notice that
   
   there is no V_ref/2 in the ADC0808/0809 chip.
   

   
   
   
   

   Figure 13-5. ADC0808/0809
   
   Table 13-3: ADC0808/0809 Analog Channel Selection
   
   
   
   
   
   
   

   
   

   Table 13-4: V_ref Relation to V_in Range for ADC0808/0809
   
   Steps to program the ADC0808/0809
   
   The following are steps to get data from an ADC0808/0809.
   
   1. Select an analog channel by providing bits to A, B, and C addresses according
      to Table 13-3.
      
   2. Activate the ALE (address latch enable) pin. It needs an L-to-H pulse to latch
      in the address. See Figure 13-6.
      
2. Activate SC (start conversion) by an L-to-H pulse to initiate conversion.
   
   1. Monitor EOC (end of conversion) to see whether conversion is finished. H-to-
      L output indicates that the data is converted and is ready to be picked up. If
      we do not use EOC, we can read the converted digital data after a brief time
      delay. The delay size depends on the speed of the external clock we connect
      to the CLK pin. Notice that the EOC is the same as the INTR pin in other ADC
      chips.
      
   2. Activate OE (output enable) to read data out of the ADC chip. An L-to-H pulse
      to the OE pin will bring digital data out of the chip. Also notice that the OE is
      the same as the RD pin in other ADC chips.
      

   
   

   Figure 13-6. Selecting a Channel and Read Timing for ADC0809
   
   Notice in the ADC0808/0809 that there is no self-clocking and the clock must be provided from an external source to the CLK pin. Although the speed of conversion depends on the frequency of the clock connected to the CLK pin, it cannot be faster than 100 microseconds.
   
   
   
   
   

   
   
   
   

   
   
   Figure 13-7. 8051 Connection to ADC0809 for Channel 1
   
   Figure 13-7 shows the connections for the following programs.
   
   Programming ADC0808/0809 in Assembly
   
   
   

   
   
   
   

   
   
   
   
   
   

   
   

   ADC0848 interfacing
   
   The ADC0848 1C is another analog-to-digital converter in the family of the ADC0800 series from National Semiconductor Corp. Data sheets for this chip can be found at their Web site, www.national.com. From there, go to Products > Analog-Data Acquisition > A-to-D Converter-General Purpose.
   
   The ADC0848 has a resolution of 8 bits. It is an 8-channel ADC, thereby
   

   
   

   allowing it to monitor up to 8 different analog inputs. See Figure 13-8. The ADC0844 chip in the same family has 4 channels. The following describes the pins oftheADC0848.
   
   CS
   
   Chip select is an active low input used to activate the 848 chip. To access the 848, this pin must be low.
   
   RD (read)
   
   RD is an input signal and is active low. ADC converts the analog input to its binary equivalent and holds it in an internal register. RD is used to get the converted data out of the 848 chip. When CS = 0, if the RD pin is asserted low, the 8-bit digital output shows up at the DO – D7 data pins. The RD pin is also referred to as output enable (OE).
   
   Vref
   
   V_ref is an input voltage used for the reference voltage. The voltage connected to
   

   
   

   
   
   this pin dictates the step size. For the ADC0848, the step size is V_ref/256
   
   since it is an 8-bit ADC and 2 to the power of 8 gives us 256 steps. See Table 13-5. For example, if the analog input range needs to be 0 to 4 volts, V_ref is connected to 4 volts.
   
   That gives 4 V/256 = 15.62 mV for
   
   the step size. In another case, if we ^{Note:
   Ste}P ^{slze
   =} Vref^.
   
   need a step size of 10 mV, then V_ref = 2.56 V, since 2.56 V/256 = 10 mV.
   
   DBO – DB7
   
   DBO – DB7 are the digital data output pins. With a DO – D7 output, the 848 must be an 8-bit ADC. The step size, which is the smallest change, is dictated by the number of digital outputs and the V_ref voltage. To calculate the output voltage, we use the following formula:
   
   
   
   
   
   
   
   
   
   
   
   
   
   where D_out = digital data output (in decimal), V_in = analog input voltage and step
   
   size (resolution) is the smallest change, which is V_Tef/256 for an 8-bit ADC. See
   
   Example 13-1 for clarification. Notice that DO – D7 are tri-state buffered and that the converted data is accessed only when CS = 0 and a low pulse is applied to the RD pin. Also, notice the dual role of pins DO – D7. They are also used to send in the channel address. This is discussed next.
   
   Example 13-1
   

   
   
   
   

   
   
   Figure 13-9. ADC0848 Block Diagram
   
   MAO – MA4 (multiplexed address).
   
   The ADC0848 uses multiplexed address/data pins to select the channel. Notice in Figure 13-9 that a portion of the DBO – DB7 pins are also designated as MAO – MA4. The DO – D7 pins are inputs when the channel’s address is sent in. However, when the converted data is being read, DO – D7 are outputs. While the use of multiplexed address/data saves some pins, it makes I/O interfacing more difficult as we will soon see.
   
   WR (write; a better name might be “start conversion”).
   
   This is an input into the ADC0848 chip and plays two important roles: (1) It latches the address of the selected channel present on the DO – D7 pins, and (2) it informs the ADC0848 to start the conversion of the analog input at that channel.
   
   
   
   
   
   If CS = 0 when WR makes a low-to-high transition, the ADC0848 latches in the address of the selected channel and starts converting the analog input value to an 8-bit digital number. The amount of time it takes to convert is a maximum of 40 us for the ADC0848. The conversion time is set by an internal clock.
   
   CH1 – CH8
   
   CH1 – CHS are 8 channels of the V_in analog inputs. In what is called single-ended mode, each of the 8 channels can be used for analog V_in, where the
   
   AGND (analog ground) pin is used as a ground reference for all the channels. These 8 channels of input allow us to read 8 different analog signals, but not all at the same time since there is only a single DO – D7 output. We select the input channel by using the MAO – MA4 multiplexed address pins according to Table 13-6. In Table 13-6, notice that MA4 = low and MA3 = high for single-ended mode. The ADC0848 can also be used in differential mode. In differential mode, two channels, such as CHI and CH2, are paired together for the V_in(+) and V_jn(-)
   
   differential analog inputs. In that case V_jn = CH1(+) – CH2(-) is the differential
   
   analog input. To use ADC0848 in differential mode, MA4 = don’t care, and MA3 is set to low. For more on this, see the ADC0848 data sheet on the www.nation-al.com Web site. Table 13-6: ADC0848 Analog Channel Selection (Single-Ended Mode)
   

   
   

   
   
   Note: Channel is selected when CS = 0, RD =1, and an L-to-H pulse is applied to WK.
   
   VCC
   
   V_cc is the +5 volt power supply.
   
   AGND, DGND (analog ground and digital ground).
   
   Both are input pins providing the ground for both the analog signal and the digital signal. Analog ground is connected to the ground of the analog Vj_n while
   
   digital ground is connected to the ground of the V_cc pin. The reason that we have two ground pins is to isolate the analog V_in signal from transient voltages caused
   
   by digital switching of the output DO – D7. Such isolation contributes to the accuracy of the digital data output. Notice that in the single-ended mode the voltage at the channel is the analog input and AGND is the reference for the V_in. In our discussion, both the AGND and DGND are connected to the same ground; however, in the real world of data acquisition, the analog and digital grounds are handled separately.
   
   
   
   
   
   INTR (interrupt; a better name might be “end of conversion”).
   
   This is an output pin and is active low. It is a normally high pin and when the conversion is finished, it goes low to signal the CPU that the converted data is ready to be picked up. After INTR goes low, we make CS = 0 and apply a low pulse to the RD pin to get the binary data out of the ADC0848 chip. See Figure 13-10.
   
   
   
   Figure 13-10. Selecting a Channel and Read Timing for the ADC0848
   
   Selecting an analog channel
   
   The following are the steps we need to take for data conversion by the ADC0848 chip.
   
   1. While CS = 0 and RD = 1 provide the address of the selected channel (see
      Table 13-6) to the DBO – DB7 pins, and apply a low-to-high pulse to the WR
      pin to latch in the address and start the conversion. The channel’s addresses are
      08H for CHI, 09H for CH2, OAH for CH3, and so on, as shown in Table 13-
      6. Notice that this process not only selects the channel, but also starts the con
      version of the analog input at the selected channel.
      
   2. While WR = 1 and RD = 1 keep monitoring the INTR pin. When INTR goes
      low, the conversion is finished and we can go to the next step. If INTR is high,
      we keep the ADC0848 polling until it goes low, signalling end-of-conversion.
      
   3. After the INTR has become low, we must make CS = 0, WR = 1, and apply a
      low pulse to the RD pin to get the data out of the 848 1C chip.
      
   ADC0848 connection to 8051
   
   The following is a summary of the connection between the 8051 and the ADC0848 as shown in Figure 13-11.
   

   
   

   
   
   Notice the following facts about Figure 13-11.
   
   1. P2 is an output when we select a channel, and it is an input when we read the
      converted data.
      
   2. We can monitor the INTR pin of the ADC for end-of-conversion or we can
      wait a few milliseconds and then read the converted data.
      
   
   
   Figure 13-11. 8051 Connection to ADC0848 for Channel 2 Displaying ADC0848 data
   
   In order to display the ADC result on a screen or LCD, it must be converted to ASCII. To convert it to ASCII, however, it must first be converted to decimal. To convert a 00 – FF hex value to decimal, we keep dividing it by 10 until the remainder is less than 10. Each time we divide it by 10 we keep the quotient as one of our decimal digits. In the case of an 8-bit data, dividing it by 10 twice will do the job. For example, if we have FFH it will become 255 in decimal. To convert from decimal to ASCII format, we OR each digit with 30H (see Chapter 6). Now all we have to do is to send the digits to the PC screen using a serial port, or send them to the LCD, as was shown in the Chapter 12.
   
   Programming AOC0848 in Assembly
   
   The following program selects channel 2, reads the data, and calls conversion and display subroutines.

   
   
   
   

   
   
   
   
   
   

   
   
   
   

   
   
   
   
   
   
   Serial ADC chips
   
   All the ADC chips we have discussed so far have been of the parallel type. The DO – D7 data pins of the ADC0848/0808/0809/0804 provide an 8-bit parallel data path between the ADC chip and the CPU. In the case of the 16-bit parallel ADC chip, we need 16 pins for the data path. In recent years, for many applications where space is a critical issue, using such a large number of pins for data is not feasible. For this reason, serial devices such as the serial ADC are becoming widely used. Next, we examine the MAX1112 serial ADC chip from Maxim Corporation (www.maxim-ic.com), and show how to interface it with the microcontroller.
   
   MAX1112ADC
   
   The MAX1112 is an 8-bit serial ADC chip with 8 channels of analog input. It has a single dqut P^^{11
   to} bring out the digital data after it has been converted. It is compatible with a popular SPI and Microwire serial standard. The following are descriptions of the MAX1112 pins. (See Figure 13-12.)
   

   
   

   CHO – CH7
   
   CHO – CH7 are 8 channels of the analog inputs. In the single-ended mode, each of the channels can be used for an analog input where the COM pin is used as a ground reference for all the channels. In single-ended mode, 8 channels of input allow us to read 8 different analog inputs. We select the input channel by sending in the control byte via the DIN pin. In differential mode, we have 4 sets of 2-channel differentials. CHO and CHI go together, and CH2 -CH3, and so on.
   
   COM
   
   Ground reference for the analog input in single-ended mode.
   
   CS
   
   Chip select is an active low input used to select the MAX1112 chip. To send in the control byte via the D_[N pin, CS must be low. When CS is high the
   
   dqjjj is high impedance.
   
   SCLK
   
   Serial clock input. SCLK is used to bring data out and send in the control byte, one bit at a time.
   
   dout
   
   Serial data out. The digital data is clocked out one bit at a time on the H-to-L edge (falling edge) of SCLK.
   
   
   
   
   
   
   
   Figure 13-13. MAX1112 Serial ADC Block Diagram
   
   din
   
   Serial data in the control byte is clocked in one bit at a time on the L-to-H edge (rising edge) of SCLK.
   
   SSTRB
   
   Serial strobe output. In internal clock mode this indicates end-of-conver-sion. It goes high when the conversion is complete.
   
   vdd
   
   v_dd is the +5 volt power supply.
   
   AGND, DGND (analog ground and digital ground)
   
   Both are input pins providing ground for both the analog and the digital signals.
   
   SHDN
   
   Shutdown is an input and is normally not connected (or is connected to V_DD). If low, the ADC is shut down to save power. This is shut down by hardware. The control byte causes shutdown by software. REFIN
   
   Reference voltage input. This voltage dictates the step size. REFOUT
   
   Internal Reference Generator output. A 1 uF bypass capacitor is placed between this pin and AGND.
   
   MAX1112 control byte
   
   The MAX1112 chip has 8 channels of analog inputs that are selected using a control byte. The control byte is fed into the MAX1112 serially one bit at a time via the D_IN pin with the help of SCLK. The control byte must be sent in with the
   
   MSB (most significant bit) going in first. The MSB of the control byte is high to indicate the start of the control byte, as shown in Figure 13-14.
   
   
   
   
   
   
   
   Figure 13-14. MAX1112 Control Byte
   
   REFIN voltage and step size
   
   The step size for the MAX1112 depends on the voltage connected to the REFIN pin. In unipolar mode, with V_DD = 5 V, we get 4.096 V for full-scale if
   
   the REFIN pin is connected to the AGND with a 1-fiF capacitor. That gives us a
   
   
   
   Figure 13-15. 8051 Connection to MAX1112 for 2nd Channel
   
   
   
   
   
   16-mV step size since 4.096 V/256 = 16mV. To get a 10-mV step size, we need to connect the REFIN pin to a 2.56 V external voltage source, since 2.56 V/256 = 10 mV. According to the MAX1112 data sheet, the external reference voltage must be between 1 V and V_DD. Notice the lower limit for the reference voltage.
   
   Selecting a channel
   
   We select the analog input channel using the control byte. See Example 13-2. Notice that the MSB (D7) of the control byte must be high.
   
   Example 13-2
   
   Find the MAX1112 control byte for (a) CHO, and (b) CH3. Assume single-ended, unipolar, internal clock, and fully operational modes.
   
   Solution:
   
   From Figure 13-14, we have the following:
   
   (a) 10001110 (8E in hex) (b) 10111110 (BE in hex)
   
   
   
   Figure 13-16. Sending Control Byte into MAX1112
   
   The control byte is fed into the DIN pin one bit at a time using SCLK. The DIN pin clocks in the control byte on the rising edge of SCLK as shown in Figure 13-16.
   
   
   
   
   

   
   

   Start conversion and end of conversion for MAX1112
   
   When the last bit of the control byte, PDO, is sent in, the conversion starts, and SSTRB goes low. The end-of-conversion state is indicated by SSTRB going high, which happens 55 us after PDO is clocked in. We can either wait 55 us, or monitor SSTRB before we get the digital data out of the ADC chip. Next we show how to get digital data out of the MAX1112.
   
   Reading out digital data
   
   The 8-bit converted digital data is brought out of the MAX1112 via the dqjjj pin using SCLK. As we apply a negative-edge pulse to the SCLK pin, the
   
   8-bit digital data is read out one bit at a time with the MSB (D7) coming out first. The SSTRB goes high to indicate that the conversion is finished. According to the MAX1112 data sheet, “after SSTRB goes high, the second falling edge of SCLK produces the MSB” of converted data at the D0_UT pin. In other words, we need
   
   9 pulses to get data out. To bring data out, CS must be low. See Figure 13-17.
   
   
   
   
   
   
   
   Figure 13-17. Reading ADC Data Byte from MAX1112
   
   The following is Assembly code for reading out digital data in the MAX1112:
   
   
   
   
   
   
   
   
   
   MAX1112 program in Assembly
   
   ;The following program selects the channel and
   

   
   

   
   
   
   
   
   
   MAX1112 program in C
   
   //The following program selects the channel and //reads ADC data