The CPU can access data in various ways. The data could be in a register, or in memory, or be provided as an immediate value. These various ways of accessing data are called addressing modes. In this chapter we discuss 8051/52 addressing modes in the context of some examples.
The various addressing modes of a microprocessor are determined when it is designed, and therefore cannot be changed by the programmer. The 8051 provides a total of five distinct addressing modes. They are as follows:
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immediate
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register
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direct
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register indirect
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indexed
In Section 5.1 we look at immediate and register addressing modes. In Section 5.2 we cover accessing memory using the direct, register indirect, and indexed addressing modes. Section 5.3 discusses the bit-addressability of RAM, registers, and I/O ports. In Section 5.4 we show how to access the extra 128 bytes of RAM in the 8052.
SECTION 5.1: IMMEDIATE AND REGISTER ADDRESSING MODES
In this section, first we examine immediate addressing mode and then register addressing mode.
Immediate addressing mode
Although the DPTR register is 16-bit, it can also be accessed as two 8-bit registers, DPH and DPL, where DPH is the high byte and DPL is the low byte. Look at the following code.
In this addressing mode, the source operand is a constant. In immediate addressing mode, as the name implies, when the instruction is assembled, the operand comes immediately after the opcode. Notice that the immediate data must be preceded by the pound sign, “#”. This addressing mode can be used to load information into any of the registers, including the DPTR register. Examples follow.
Also notice that the following would produce an error since the value is larger than 16 bits.
Notice that we can also use immediate addressing mode to send data to 8051 ports. For example. “MOV PI, #55H” is a valid instruction.
Register addressing mode
Register addressing mode involves the use of registers to hold the data to be manipulated. Examples of register addressing mode follow.
It should be noted that the source and destination registers must match in size. In other words, coding “MOV DPTR, A” will give an error, since the source is an 8-bit register and the destination is a 16-bit register. See the following.
Notice that we can move data between the accumulator and Rn (for n •— 0 to 7) but movement of data between Rn registers is not allowed. For example, the instruction “MOV R4, R7″ is invalid.
In the first two addressing modes, the operands are either inside one of the registers or tagged along with the instruction itself. In most programs, the data to be processed is often in some memory location of RAM or in the code space of ROM. There are many ways to access this data. The next section describes these different methods.
