SECTION C.3: SYSTEM DESIGN ISSUES
In addition to fan-out, the other issues related to system design are power dissipation, ground bounce, Vcc bounce, crosstalk, and transmission lines. In this section we provide an overview of these topics.
Power dissipation considerations
Power dissipation of a system is a major concern of system designers, especially for laptop and hand-held systems in which batteries provide the power. Power dissipation is a function of frequency and voltage as shown below:
In the above equations, the effects of frequency and Vcc voltage should be noted. While the power dissipation goes up linearly with frequency, the impact of the power supply voltage is much more pronounced (squared). See Example C-2.
Example C-2
Compare the power consumption of two 8051 systems. One uses 5 V and the other uses 3 V for Vcc.
Solution:
Since P = VI, by substituting I = V/R we have P = V2/R. Assuming that R = 1, we have P = 52 = 25 W and P = 32 = 9 W. This results in using 16 W less power, which means power saving of 64%. (16/25 x 100) for systems using 3 V for power source.
Dynamic and static currents
Two major types of currents flow through an 1C: dynamic and static. A dynamic current is I = CVF. It is a function of the frequency under which the component is working. This means that as the frequency goes up, the dynamic current and power dissipation go up. The static current, also called DC, is the current consumption of the component when it is inactive (not selected). The dynamic current dissipation is much higher than the static current consumption. To reduce power consumption, many microcontrollers, including the 8051, have power-saving modes. In the 8051, the power saving modes are called idle mode and power down mode. Each one is described next.
Idle mode
In idle mode, which is also called sleep mode, the core CPU is put to sleep while all on-chip peripherals, such as the serial port, timers, and interrupts, remain
active and continue to function. In this mode, the oscillator continues to provide clock to the serial port, interrupt, and timers, but no clock is provided to the CPU. Notice that during this mode all the contents of the registers and on-chip RAM remain unchanged.
Power down mode
In the power down mode, the on-chip oscillator is frozen, which cuts off frequency to the CPU and peripheral functions, such as serial ports, interrupts, and timers. Notice that while this mode brings power consumption down to an absolute minimum, the contents of RAM and the SFR registers are saved and remain unchanged.
Ground bounce
One of the major issues that designers of high-frequency systems must grapple with is ground bounce. Before we define ground bounce, we will discuss lead inductance of 1C pins. There is a certain amount of capacitance, resistance, and inductance associated with each pin of the 1C. The size of these elements varies depending on many factors such as length, area, and so on.
The inductance of the pins is commonly referred to as self-inductance since there is also what is called mutual inductance, as we will show below. Of the three components of capacitor, resistor, and inductor, the property of self-inductance is the one that causes the most problems in high-frequency system design since it can result in ground bounce. Ground bounce occurs when a massive amount of current flows through the ground pin caused by many outputs changing from high to low all at the same time. See Figure C-21(a). The voltage is related to the inductance of the ground lead as follows:
As we increase the system frequency, the rate of dynamic current, di/dt, is also increased, resulting in an increase in the inductance voltage L (di/dt) of the ground pin. Since the low state (ground) has a small noise margin, any extra voltage due to the inductance can cause a false signal. To reduce the effect of ground bounce, the following steps must be taken where possible.
The Vcc and ground pins of the chip must be located in the middle rather than
at opposite ends of the 1C chip (the 14-pin TTL logic 1C uses pins 14 and 7 for
ground and Vcc). This is exactly what we see in high-performance logic gates
such as Texas Instruments’ advanced logic AC 11000 and ACT11000 families.
For example, the ACT11013 is a 14-pin DIP chip in which pin numbers 4 and
11 are used for the ground and Vcc, instead of 7 and 14 as in the traditional
TTL family. We can also use the SOIC packages instead of DIP.
Another solution is to use as many pins for ground and Vcc as possible to
reduce the lead length. This is exactly why all high-performance microproces
sors and logic families use many pins for Vcc and ground instead of the tradi
tional single pin for Vcc and single pin for GND. For example, in the case of
Intel’s Pentium processor there are over 50 pins for ground, and another 50
pins for Vcc.
Figure C-21. (a) Ground Bounce (b) Transient Current
The above discussion of ground bounce is also applicable to Vcc when a large number of outputs changes from the low to the high state; this is referred to as Vcc bounce. However, the effect of Vcc bounce is not as severe as ground bounce since the high (“1″) state has a wider noise margin than the low (“0″) state.
Filtering the transient currents using decoupling capacitors
In the TTL family, the change of the output from low to high can cause what is called transient current. In a totem-pole output in which the output is low, Q4 is on and saturated, whereas Q3 is off. By changing the output from the low to the high state, Q3 turns on and Q4 turns off. This means that there is a time when both transistors are on and drawing current from Vcc. The amount of current
depends on the ron values of the two transistors, which in turn depend on the internal parameters of the transistors. However, the net effect of this is a large amount of current in the form of a spike for the output current, as shown in Figure C-21(b). To filter the transient current, a 0.01 uF or 0.1 (iF ceramic disk capacitor can be placed between the Vcc and ground for each TTL 1C. However, the lead for this capacitor should be as small as possible since a long lead results in a large self-inductance, and that results in a spike on the Vcc line [V = L (di/dt)]. This spike is called Vcc bounce. The ceramic capacitor for each 1C is referred to as a decoupling capacitor. There is also a bulk decoupling capacitor, as described next.
Bulk decoupling capacitor
If many 1C chips change state at the same time, the combined currents drawn from the board’s Vcc power supply can be massive and may cause a fluctuation of Vcc on the board where all the ICs are mounted. To eliminate this, a relatively large decoupling tantalum capacitor is placed between the Vcc and ground
lines. The size and location of this tantalum capacitor varies depending on the number of ICs on the board and the amount of current drawn by each 1C, but it is common to have a single 22 uF to 47 |^F capacitor for each of the 16 devices, placed between the Vcc and ground lines.
Crosstalk
Crosstalk is due to mutual inductance. See Figure C-22. Previously, we discussed self-inductance, which is inherent in a piece of conductor. Mutual inductance is caused by two electric lines running parallel to each other. The mutual inductance is a function of 1, the length of two conductors running in parallel, d, the distance between them, and the medium material placed between them. The effect of crosstalk can be
reduced by increasing the distance between the parallel or adjacent lines (in printed circuit boards, they will be traces). In many cases, such as printer and disk drive cables, there is a dedicated ground for each signal. Placing ground lines (traces) between signal lines reduces the effect of crosstalk. This method is used even in some ACT logic families where there are a Vcc and GND pin next to each other. Crosstalk is also called EMI (electromagnetic interference). This is in contrast to ESI (electrostatic interference), which is caused by capacitive coupling between two adjacent conductors.
Transmission line ringing
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The square wave used in digital circuits is in reality made of a single fundamental pulse and many harmonics of various amplitudes. When this signal travels on the line, not all the harmonics respond in the same way to the capacitance, inductance, and resistance of the line. This causes what is called ringing, which depends on the thickness and the length of the line driver, among other factors. To reduce the effect of ringing, the line drivers are terminated by putting a resistor at the end of the line. See Figure C-23. There are three major methods of line driver termination: parallel, serial, and Thevenin.
In serial termination, resistors of 30 – 50 ohms are used to terminate the line. The parallel and Thevenin methods are used in cases where there is a need to match the impedance of the line with the load impedance. This requires a detailed analysis of the signal traces and load impedance. In high-frequency systems, wire traces on the printed circuit board (PCB) behave like transmission lines, causing ringing. The severity of this ringing depends on the speed and the logic family used. Table C-8 provides the length of the traces, beyond which the traces must be looked at as transmission lines.
