As discussed in Chapter 1, the 8031 chip is a ROMless version of the 8051. In other words, it is exactly like any member of the 8051 family such as the 8751 or 89C51 as far as executing the instructions and features are concerned, but it has no on-chip ROM. Therefore, to make the 8031 execute 8051 code, it must be connected to external ROM memory containing the program code. In this section we look at interfacing the 8031 microcontroller with external ROM. Before we discuss this topic, one might wonder why someone would want to use the 8031 when they could buy an 8751, 89C51, or DS5000. The reason is that all these chips have a limited amount of on-chip ROM. Therefore, in many systems where the on-chip ROM of the 8051 is not sufficient, the use of an 8031 is ideal since it allows the program size to be as large as 64K bytes. Although the 8031 chip itself is much cheaper than other family members, an 8031-based system is much more expensive since the ROM containing the program code is connected externally and requires more supporting circuitry, as we explain next. First, we review some of the pins of the 8031/51 used in external memory interfacing. See Figure 14-7.
EA pin

As shown in Chapter 4, for 8751/89C51/DS5000-based systems, we connect the EA pin to Vcc to indicate that the program code is stored in the microcontroller’s on-chip ROM. To indicate that the program code is stored in external ROM, this pin must be connected to GND. This is the case for the 8051-based system. In fact, there are times when, due to repeated burning and erasing of on-chip ROM, its UV-EPROM is no longer working. In such cases one can also use the 8751 (or 89C51 or any 8051) as the 8031. All we have to do is to connect the EA pin to ground and connect the chip to external ROM containing the program code.

Figure 14-7. 8051 Pin Diagram
PO and P2 role in providing addresses

Figure 14-8. 74LS373 D Latch
(Reprinted by permission of Texas Instruments, Copyright
Texas Instruments, 1988)
Since the PC (program counter) of the 8031/51 is 16-bit, it is capable of accessing up to 64K bytes of program code. In the 8031/51, port 0 and port 2 provide the 16-bit address to access external memory. Of these two ports, PO provides the lower 8 bit addresses AO – A7, and P2 provides the upper 8 bit addresses A8 – A15. More importantly, PO is also used to provide the 8-bit data bus DO – D7. In other words, pins PO.O – P0.7 are used for both the address and data paths. This is called address/data multiplexing in chip design. Of course the reason Intel used address/data multiplexing in the 8031/51 is to save pins. How do we know when PO is used for the data path and when it is used for the address path? This is the job of the ALE (address latch enable) pin. ALE is an output pin for the 8031/51 microcontroller. Therefore, when ALE = 0 the 8031 uses PO for the data path, and when ALE = 1, it uses it for the

address path. As a result, to extract the addresses from the PO pins we connect PO to a 74LS373 latch (see Figure 14-8) and use the ALE pin to latch the address as shown in Figure 14-9. This extracting of addresses from PO is called address/data demultiplexing.

Figure 14-9. Address/Data Multiplexing
From Figure 14-9, it is important to note that normally ALE = 0, and PO is used as a data bus, sending data out or bringing data in. Whenever the 8031/51 wants to use PO as an address bus, it puts the addresses AO – A7 on the PO pins and activates ALE = 1 to indicate that PO has the addresses.

Figure 14-10. Data, Address, and Control Buses for the 8031
(For reset and crystal connection, see Chapter 4.)
Another important signal for the 8031/51 is the PSEN (program store enable) signal. PSEN is an output signal for the 8031/51 microcontroller and must be connected to the OE pin of a ROM containing the program code. In other words, to access external ROM containing program code, the 8031/51 uses the PSEN signal. It is important to emphasize the role of EA and PSEN when con-

necting the 8031/51 to external ROM. When the EA pin is connected to GND, the 8031/51 fetches opcode from external ROM by using PSEN. Notice in Figure 14-11 the connection of the PSEN pin to the OE pin of ROM. In systems based on the 8751/89C51/DS5000 where EA is connected to VCC, these chips do not activate the PSEN pin. This indicates that the on-chip ROM contains program code.
In systems where the external ROM contains the program code, burning the program into ROM leaves the microcontroller chip untouched. This is preferable in some applications due to flexibility. In such applications the software is updated via the serial or parallel ports of the IBM PC. This is especially the case during software development and this method is widely used in many 8051-based trainers and emulators.

Figure 14-11. 8031 Connection to External Program ROM
On-chip and off-chip code ROM
In all our examples of 8051-based systems so far, we used either the on-chip ROM or the off-chip ROM for the program code. There are times that we want to use both of them. Is this possible? The answer is yes. For example, in an 8751 (or 89C51) system we could use the on-chip ROM for the boot code, and an external ROM (using NV-RAM) will contain the user’s program. In this way, the system boot code resides on-chip and the user’s programs are downloaded into off-chip NV-RAM. In such a system we still have EA = Vcc, meaning that upon reset the 8051 executes the on-chip program first; then, when it reaches the end of the on-chip ROM it switches to external ROM for the rest of the program code. Many 8051 trainers are designed using this method. Again, notice that this is done automatically by the 8051. For example, in an 8751 (89C51) system with both on-chip and off-chip ROM code where EA = Vcc, the controller fetches opcodes starting at address 0000, then goes on to address OFFF (the last location of on-chip ROM). Then the program counter generates address 1OOOH and is automatically directed to the external ROM containing the program code. See Examples 14-7 and 14-8. Figure 14-12 shows the memory configuration.

Figure 14-12. On-chip and Off-chip Program Code Access
Example 14-7
Discuss the program ROM space allocation for each of the following cases.
  1. EA= 0 for the 8751 (89C51) chip.
  2. EA = Vcc with both on-chip and off-chip ROM for the 8751.
  3. EA = Vcc with both on-chip and off-chip ROM for the 8752.
    1. When EA = 0, the EA pin is strapped to GND, and all program fetches are directed
      to external memory regardless of whether or not the 8751 has some on-chip ROM
      for program code. This external ROM can be as high as 64K bytes with address
      space of 0000 – FFFFH. In this case an 8751 (89C51) is the same as the 8031 sys
    2. With the 8751 (89C5.1) system where EA = Vcc, the microcontroller fetches the pro
      gram code of addresses 0000 – OFFFH from on-chip ROM since it has 4K bytes of
      on-chip program ROM and any fetches from addresses 1000H – FFFFH are direct
      ed to external ROM.
    3. With the 8752 (89C52) system where EA = Vcc, the microcontroller fetches the pro
      gram code of addresses 0000 – 1FFFH from on-chip ROM since it has 8K bytes of
      on-chip program ROM and any fetches from addresses 2000H – FFFFH are direct
      ed to external ROM.
Example 14-8
Discuss the role of the PSEN pin in accessing on-chip and off-chip program codes.

In the process of fetching the internal on-chip program code the PSEN pin is not used and is never activated. However, PSEN is used for all external program fetches. In Figure 14-11, notice that PSEN is also used to activate the CE pin of the program ROM.

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